Optimization: Inlining

Author: Smail
Predecessor: variant_inlining_7_symmetry_2.cpp
File(s): variants/variant_inlining_7_symmetry_2_ilp_1.cpp
Status: TBA

What this changes

Implemented ILP with loop unrolling and accumulators, each factor 4.

Code (relevant snippet)

TBD - see variants/variant_inlining_7_symmetry_1.cpp for the final version, and the individual file headers for the incremental steps.

Benchmark

Conditions: single run (TODO: switch to min-of-N), N_ITER=1000, -O3 -march=native -flto. Predecessor reference for the same config is the baseline row.

x86

Machine:

Processors: 16 x AMD Ryzen AI 7 350 w/ Radeon 860M
Memory: 32 GiB of RAM (30.6 GiB usable)
Graphics Processor: AMD Radeon 860M Graphics
Manufacturer: LENOVO
Product Name: 83HX
System Version: IdeaPad Slim 5 14AKP10

Frequency: 2 GHz

Existing single-point measurement (N unspecified, kept from the previous OPTIMIZATIONS.md; W matches roughly N=120 at N_ITER=1000):

Variant	W(n) [Flops]	T(n) [Cycles]	Performance [Flops/Cycle]
Baseline	1'058'400'000.00	850'352'900.00	1.24
Inlining	1'058'400'000.00	756'088'260.00	1.40
Symmetry

Inlining is about 12.9% faster on this point. A full N sweep with min-of-3 is TODO.

Full sweep (TODO):

N	W(n) [Flops]	T(n) [Cycles]	Performance [Flops/Cycle]	Diff vs Predecessor
50
100
200
500
1000

ARM (Apple)

Machine:

TBD

Frequency: TBD

N	W(n) [Flops]	T(n) [Cycles]	Performance [Flops/Cycle]	Diff vs Predecessor
50
100
200
500
1000

Analysis

Speedup likely comes mainly from halving the number of sqrt flops.

Takeaway

TBD

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